Title: History-Based Arbitration for Fairness in Processor-Interconnect of NUMA Servers
Speaker: : 송원준 박사
Date & Time: 2017. 3. 29. 수요일 14:00
Where: 융대원 D-401호
NUMA (non-uniform memory access) servers are commonly used in high-performance computing and datacenters. Within each server, a processor-interconnect (e.g., Intel QPI, AMD HyperTransport) is used to communicate between the different sockets or nodes.
In this work, we explore the impact of the processor-interconnect on overall performance – in particular, the performance unfairness caused by processor-interconnect arbitration.
It is well known that locally-fair arbitration does not guarantee globally-fair bandwidth sharing as closer nodes receive more bandwidth in a multi-hop network.
However, this work demonstrates that the opposite can occur in a commodity NUMA server where remote nodes receive higher bandwidth (and perform better). We analyze this problem and identify that this occurs because of externalconcentration used in router micro-architectures for processor-interconnects without globally-aware arbitration. While accessing remote memory can occur in any NUMA system, performance unfairness (or performance variation) is more critical in cloud computing and virtual machines with shared resources. We demonstrate how this unfairness creates significant performance variation when a workload is executed on the Xen virtualization platform.
We then provide analysis using synthetic workloads to better understand the source of unfairness and eliminate the impact of other shared resources, including the shared last-level cache and main memory.
To provide fairness, we propose a novel, history-based arbitration that tracks the history of arbitration grants made in the previous history window. A weighted arbitration is done based on the history to provide global fairness. Through simulations, we show our proposed history-based arbitra- tion can provide global fairness and minimize the processor-interconnect performance unfairness at low cost.
Wonjun Song is a Ph.D. candidate in the Department of Computer Science at the KAIST, under the mentorship of Prof. John Kim.
His main research interests are security issues of computer architecture including processor-interconnect.
He received the B.S. degree in computer science and engineering from Sungkyunkwan University in 2012, and the M.S. degree in KAIST from KAIST in 2014.
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